cystech electronics corp. spec. no. : c796v8 issued date : 2016.03.15 revised date : page no. : 1/9 mtb40p06av8 cystek product specification p-channel enhancement mode mosfet mtb40p06av8 bv dss -60v i d @t a =25 c, v gs =-10v -5a r dson @v gs =-10v, i d =-4.9a 45m (typ) r dson @v gs =-4.5v, i d =-3a 54m (typ) description the mtb40p06av8 is a p-channel enhancement-mode mosfet, providing the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost effectiveness. features ? simple drive requirement ? low on-resistance ? fast switching speed ? pb-free lead plating and halogen-free package equivalent circuit outline mtb40p06av8 dfn3 3 pin 1 g gate s source d drain ordering information device package shipping MTB40P06AV8-0-T6-G dfn3 3 (pb-free lead plating and halogen-free package) 3000 pcs / tape & reel environment friendly grade : s for rohs compliant products, g for rohs compliant and green compound products packing spec, t1 : 3000 pcs / tape & reel,7? reel product rank, zero for no rank products product name
cystech electronics corp. spec. no. : c796v8 issued date : 2016.03.15 revised date : page no. : 2/9 mtb40p06av8 cystek product specification absolute maximum ratings (ta=25 c) parameter symbol limits unit drain-source voltage v ds -60 gate-source voltage v gs 20 v continuous drain current @ t c =25 c, v gs =-10v -14 continuous drain current @ t c =100 c, v gs =-10v -8.9 continuous drain current @ t a =25 c, v gs =-10v -5 continuous drain current @ t a =70 c, v gs =-10v i d -4 pulsed drain current i dm -56 *1 a t c =25 w 21 t c =100w 8.4 t a =25 w 2.5 *3 total power dissipation t a =70 w p d 1.6 *3 w operating junction and storage temperature range tj, tstg -55~+150 c thermal data parameter symbol value unit thermal resistance, junction-to-case, max r jc 6 thermal resistance, junction-to-ambient, max r ja 50 *3 c/w note : 1. pulse width limited by maximum junction temperature 2. duty cycle 1% 3. surface mounted on 1 in2 copper pad of fr-4 board, t 10s ; 125 c/w when mounted on minimum copper pad. electrical characteristics (tj=25 c, unless otherwise specified) symbol min. typ. max. unit test conditions static bv dss -60 - - v gs =0v, i d =-250 a v gs(th) -1.0 - -2.5 v v ds =v gs , i d =-250 a i gss - - 100 na v gs =20v, v ds =0v i dss - - -1 v ds =-60v, v gs =0v i dss - - -25 a v ds =-48v, v gs =0v, tj=125 c - 45 56 v gs =-10v, i d =-4.9a r ds(on) *1 - 54 72 m v gs =-4.5v i d =-3a g fs *1 - 11 - s v ds =-5v, i d =-4.9a dynamic ciss - 1273 - coss - 73 - crss - 55 - pf v ds =-25v, v gs =0v, f=1mhz t d(on) *1, 2 - 6.2 - tr *1, 2 - 16.4 - t d(off) *1, 2 - 138.8 - t f *1, 2 - 53.8 - ns v ds =-30v, i d =-1a, v gs =-10v, r g =6
cystech electronics corp. spec. no. : c796v8 issued date : 2016.03.15 revised date : page no. : 3/9 mtb40p06av8 cystek product specification electrical characteristics(cont.) (tj=25 c, unless otherwise specified) symbol min. typ. max. unit test conditions qg *1, 2 - 24.3 - qgs *1, 2 - 3 - qgd *1, 2 - 4.3 - nc v ds =-48v, i d =-5a, v gs =-10v source-drain diode v sd *1 - -0.83 -1.3 v i s =-4.9a, v gs =0v trr - 9.8 - ns qrr - 5 - nc i f =-5a, di f /dt=100a/ s note : *1.pulse test : pulse width 300 s, duty cycle 2% *2.independent of operating temperature *3.pulse width limited by maximum junction temperature. recommended soldering footprint unit : mm
cystech electronics corp. spec. no. : c796v8 issued date : 2016.03.15 revised date : page no. : 4/9 mtb40p06av8 cystek product specification typical characteristics typical output characteristics 0 10 20 30 40 024681 0 10v, 9v, 8v, 7v, 6v, 5v -v ds , drain-source voltage(v) -i d , drain current(a) 4v 3.5v 3 v -v =2.5v gs brekdown voltage vs ambient temperature 0.4 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) -bv dss , normalized drain-source breakdown voltage i d =-250 a, v gs =0v static drain-source on-state resistance vs drain current 10 100 0.01 0.1 1 10 100 -i d , drain current(a) r ds(on) , static drain-source on-state resistance(m) v gs =-10v v gs =-4.5v v gs =-4v reverse drain current vs source-drain voltage 0.2 0.4 0.6 0.8 1 1.2 0 5 10 15 20 -i dr , reverse drain current(a) -v sd , source-drain voltage(v) tj=25c tj=150c v gs =0v static drain-source on-state resistance vs gate-source voltage 0 20 40 60 80 100 120 140 160 180 200 024681 0 drain-source on-state resistance vs junction tempearture 0 0.4 0.8 1.2 1.6 2 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) r ds(on) , normalized static drain- source on-state resistance v gs =-10v, i d =-4.9a r ds( on) @tj=25c : 45m typ. -v gs , gate-source voltage(v) r ds(on) , static drain-source on- state resistance(m) i d =-4.9a
cystech electronics corp. spec. no. : c796v8 issued date : 2016.03.15 revised date : page no. : 5/9 mtb40p06av8 cystek product specification typical characteristics(cont.) capacitance vs drain-to-source voltage 10 100 1000 10000 0 5 10 15 20 25 30 -v ds , drain-source voltage(v) capacitance---(pf) c oss ciss crss threshold voltage vs junction tempearture 0.2 0.4 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) -v gs(th) , normalized threshold voltage i d =-250 a i d =-1ma maximum safe operating area 0.01 0.1 1 10 100 0.01 0.1 1 10 100 1000 -v ds , drain-source voltage(v) -i d , drain current(a) dc 1ms 100 s 1s r ds( on) limit t a =25c, tj=150, v gs =-10v r ja =50c/w, single pulse 10ms 100ms gate charge characteristics 0 2 4 6 8 10 0 4 8 12 16 20 24 28 qg, total gate charge(nc) -v gs , gate-source voltage(v) v ds =-48v i d =-5a v ds =-30v v ds =-12v forward transfer admittance vs drain current 0.01 0.1 1 10 100 0.001 0.01 0.1 1 10 100 -i d , drain current(a) g fs , forward transfer admittance(s) v ds =-5v pulsed ta=25c maximum drain current vs junction temperature 0 1 2 3 4 5 6 25 50 75 100 125 150 175 t j , junction temperature(c) -i d , maximum drain current(a) t a =25c, v gs =-10v, r ja =50c/w
cystech electronics corp. spec. no. : c796v8 issued date : 2016.03.15 revised date : page no. : 6/9 mtb40p06av8 cystek product specification typical characteristics(cont.) typical transfer characteristics 0 5 10 15 20 25 30 35 40 012345 -v gs , gate-source voltage(v) -i d , drain current(a) v ds =-10v single pulse power rating, junction to ambient (note on page 2) 0 50 100 150 200 250 300 350 0.0001 0.001 0.01 0.1 1 10 100 pulse width(s) power (w) t j(max) =150c t a =25c r ja =50c/w transient thermal response curves 0.001 0.01 0.1 1 1.e-04 1.e-03 1.e-02 1.e-01 1.e+00 1.e+01 1.e+02 1.e+03 t 1 , square wave pulse duration(s) r (t), normalized transient thermal resistance single pulse 0.01 0.02 0.05 0.1 0.2 d=0. 1.r ja (t)=r(t)*r ja 2.duty factor, d=t1/t2 3.t jm -t a =p dm *r ja (t) 4.r ja =50c/w
cystech electronics corp. spec. no. : c796v8 issued date : 2016.03.15 revised date : page no. : 7/9 mtb40p06av8 cystek product specification reel dimension carrier tape dimension
cystech electronics corp. spec. no. : c796v8 issued date : 2016.03.15 revised date : page no. : 8/9 mtb40p06av8 cystek product specification recommended wave soldering condition product peak temperature soldering time pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak temperature(tp) 10-30 seconds 20-40 seconds ramp down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of the package, measured on the package body surface.
cystech electronics corp. spec. no. : c796v8 issued date : 2016.03.15 revised date : page no. : 9/9 mtb40p06av8 cystek product specification dfn3 3 dimension marking: 8-lead dfn3 3 plastic package cystek package code: v8 date code s s s g d d d d 261 1 b40 p06a *: typical millimeters inches millimeters inches dim min. max. min. max. dim min. max. min. max. a 0.605 0.850 0.026 0.033 b 0.200 0.400 0.008 0.016 a1 0.152 ref 0.006 ref e 0.550 0.750 0.022 0.030 a2 0.000 0.050 0.000 0.002 l 0.300 0.500 0.012 0.020 d 2.900 3.100 0.114 0.122 l1 0.180 0.480 0.007 0.019 d1 2.300 2.600 0.091 0.102 l2 0.000 0.100 0.000 0.004 e 2.900 3.100 0.114 0.122 l3 0.000 0.100 0.000 0.004 e1 3.150 3.450 0.124 0.136 h 0.315 0.515 0.012 0.020 e2 1.535 1.935 0.060 0.076 9 13 9 13 notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing spec ification or packing method, please cont act your local cystek sales office. material: ? lead: pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0. important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitab le for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance .
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